While several silicon-on-insulator (SOI) fabrication technologies have been developed, such as solid phase epitaxy[1], separation by implanted oxygen (SIMOX)[2][3], wafer bonding[4][5][6], SmartCut^®[7], liquid phase epitaxy[8], porous silicon[9], among others[10]. A few methods are presented here based on their current industrial significance and technological similarities to SMM-SOI.

SOI technologies may be divided into two distinct groups: Local SOI and SOI wafers. Local SOI fabrication technologies are characterized by short-range overgrowth of device-quality silicon in a localized region of a wafer. Local SOI structures are useful for today's devices that require less than $1 \mu\textrm{m} gate lengths. SOI wafer fabrication technologies are characterized by the fabrication of a complete wafer-size device layer of silicon on an insulating oxide layer. The entire wafer surface is electronically isolated from the substrate. Such wafers form the substrate for millions of devices.

Most similar to the SMM-SOI process are solid phase epitaxial (SPE) methods that utilize a seed region for short-range epitaxial lateral overgrowth (ELO) of a crystalline device layer on oxide (Fig. 3.1a). While many advances have been made to improve the ELO process, SMM-SOI overcomes many obstacles previously encountered in ELO.

The most important industrial SOI wafer fabrication technologies are separation by implanted oxygen (SIMOX), wafer bonding and an improved form of wafer bonding, SmartCut^®. A brief overview of these two processes are provided together with some discussion of the relevant advantages inherent to SMM-SOI.

References