This chapter discusses the major experimental stages of preparation and fabrication. An outline of the onsite experimental facilities used for the current investigation is provided in Appendix B.

In the current investigation, 3-inch n-type (phosphorus-doped) Si(111) and Si(100) wafers ($1-10  \Omega \cdot \textrm{cm}$ resistivity) are used. For the typical SMM-SOI fabrication process, wafers are appropriately cleaned, thermally oxidized, photolithographically patterned, and chemically or reactively etched. The prepared wafers are inserted into an ultra-high vacuum (UHV) molecular beam epitaxy (MBE) chamber and heated for final cleaning by desorption of native oxides. The deposition of an Al mediator thin film is performed at room temperature followed by the deposition of a Si diffusor at low substrate temperatures ($300^\circ \textrm{C} \lt T_{\textrm{s}} \lt 500^\circ \textrm{C}$). Reflective high energy electron diffraction (RHEED) analysis is performed at appropriate stages of the deposition process.